Hitherto, semiconductors have been continuously improved in performance, costs and power consumption by reduction of a gate length and a gate thickness of transistors, i.e., so-called micronization thereof. However, if it is intended to achieve the micronization of transistors as recently required, the gate thickness of transistors using a conventional gate insulating film made of silicon oxide becomes excessively small, so that a leakage current owing to a tunnel current increases, and power consumption becomes large. In addition, in recent years, there is an increasing demand for mobile equipments using semiconductor devices such as mobile phones, notebook type personal computers and potable music players. In this case, a power supply for these mobile equipments has been frequently relied upon rechargeable batteries. Therefore, it has been required that the semiconductor devices used in the mobile equipments have a low power consumption to achieve long-term use thereof. In consequence, for the purpose of reducing a leakage current during a stand-by state of the equipments, there has been proposed the technique in which as combination of an insulating material and a gate electrode as constituents of a transistor, combination of a high dielectric material and a metal gate is used in place of the conventional combination of silicone oxide and polysilicon (Non-Patent Document 1).
There have been conventionally proposed various methods for producing the high dielectric material and the metal gate. As one of the conventional methods, there has been proposed a so-called gate-last method in which after producing a transistor using combination of a high dielectric material and polysilicon, the polysilicon is removed to replace it with a metal gate (Non-Patent Document 1). In FIG. 1, there is shown a schematic sectional view of a part of a transistor before removing polysilicon from a semiconductor device using a high dielectric material. In recent years, when subjecting the polysilicon to wet-etching, a sheet cleaning apparatus for cleaning a silicon wafer one by one to suppress generation of particles has been frequently used. For this reason, if an etching amount of the polysilicon per unit time (hereinafter referred to as an “etch rate”) is small, the time required for the etching tends to be prolonged, so that the production output per device tends to be lowered. Thus, it has been required to develop a technique for etching polysilicon for a short period of time without occurrence of corrosion of a high dielectric material, a metal, a side wall and an interlayer insulating film in the step of removing the polysilicon.
As the technique for etching polysilicon, there is also known the method of subjecting the polysilicon to dry etching (Patent Document 1). However, not only the polysilicon but also the side wall and the interlayer insulating film are etched in the dry etching process. Therefore, it is necessary to provide a protective film such as a photoresist on the side wall and the interlayer insulating film. If such a protective film is formed, the production process tends to become complicated, so that there tend to arise the problems such as poor yield and increase in production costs. In addition, an ashing treatment required to remove the photoresist tends to cause deterioration in quality of the interlayer insulating film, which tends to cause a risk of deteriorating a performance of transistors. Also, in general, for the purpose of preventing generation of fine silicon residues, the silicon is subjected to so-called overetching in which the etching is carried out for a longer period of time than an etching treatment time calculated from the etch rate. In the dry-etching process, the high dielectric material exposed after etching the silicon tends to be etched or tends to be deteriorated in quality when subjected to the overetching, resulting in deterioration in performance of transistors.
As a cleaning solution used upon etching silicon by a wet etching method, there are known various alkaline cleaning solutions (Non-Patent Document 2). However, since these cleaning solutions have a low silicon etch rate, the time required for the etching tends to be prolonged, so that the production output per device tends to be lowered.
As a technique of etching silicon at a high etch rate, there has been proposed the use of an etching composition containing an inorganic alkali compound and a hydroxyl amine (Patent Document 2). However, alkali metal ions contained in the inorganic alkali compound tend to cause considerable deterioration in performance of transistors. Therefore, the etching composition are not applicable to production of transistors.
As another technique of etching silicon at a high etch rate, there has also been proposed the use of an etching composition containing an organic alkali compound and at least one reducing compound selected from the group consisting of hydroxyl amines, hypophosphites, reducing sugars, ascorbic acid, glyoxylic acid, brenzcatechin and derivatives of these compounds (refer to Patent Document 3 and Comparative Example 3).
There has also been proposed the stripping solution capable of suppressing etching of aluminum and reducing an adhesion strength of an adhesive film which is in the form of an alkaline solution containing a sugar alcohol as an anticorrosive agent (Patent Document 4). However, in the technique proposed in Patent Document 4, etching of aluminum with the alkaline stripping solution is prevented from such a viewpoint that its capability of reducing an adhesion strength of the adhesive film is not inhibited. Thus, Patent Document 4 fails to describe a polysilicon etching capability of the alkaline stripping solution. Therefore, the technique described in Patent Document 4 is different from that of the present invention which aims at attaining a high polysilicon etch rate. Further, in Patent Document 4, it is described that the stripping solution used therein is not particularly limited as long as it is in the form of an alkaline solution. However, alkaline compounds capable of etching the polysilicon are limited to specific compounds. Thus, the compounds suitably used in the present invention are not easily suggested from the descriptions of the Patent Document 4 (refer to Comparative Examples 4).
As a material for the metal gate, there have been adopted not only the above aluminum but also metals such as zirconium, titanium, tantalum and tungsten. However, at present, there are present no etching solutions which are suitable for production of transistors using a metal gate containing these materials. In consequence, in the process for producing a transistor including a laminate formed of at least a high dielectric material film and a metal gate containing hafnium, zirconium, titanium, tantalum or tungsten by a method of removing a dummy gate made of silicon to replace the dummy gate with the metal gate, it has been intensively demanded to provide an etching solution which is capable of selectively removing the dummy gate by etching, as well as a process for producing the transistor.